Prof. Dr. Walter Vogler
| Telefon: | +49 821 598 - 2120 |
| Fax: | +49 821 598 - 2175 |
| E-Mail: | walter.vogler_at_@informatik.uni-augsburginformatik.uni-augsburg.de () |
| Raum: | 3010 (N) |
| Adresse: | Universit?tsstra?e 6a, 86159 Augsburg |
Ver?ffentlichungen
2014
Decomposing Balsa-STGs (Working Notes)
Stanislavs Golubcovs, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, April 2014
2014-01
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2013
STG-Based Resynthesis for Balsa Circuits
Stanislavs Golubcovs, Walter Vogler, Norman Kluge
Technical Report, Institute of Computer Science, University of Augsburg, November 2013
2013-12
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2012
Interface-Automata with Error States
F. Bujtor, W. Vogler
Technical Report, 2012
2012-09
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2009
Robustness of a bisimulation-type faster-than relation
K.Iltgen, W.Vogler
Technical Report, 2009
2009-08
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2008
Gerald Lüttgen and Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2008
2008-18
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Time and Fairness in a Process Algebra with Non-Blocking Reading
F. Corradini, M.R. Di Berardini, W. Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2008
2008-13
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Avoiding Irreducible CSC Conflicts by Internal Communication
Mark Schaefer, Walter Vogler, Dominic Wist and Ralf Wollowski
Application of Concurrency to System Design ACSD 2008
IEEE 2008, 3-12
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Output-Determinacy and Asynchronous Circuit Synthesis
Victor Khomenko, Mark Schaefer, Walter Vogler
Fundamenta Informatica 88 (2008) 541 - 579
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Liveness of a Mutex Algorithm in a Fair Process Algebra
F. Corradini, M.R. Di Berardini, W. Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2008
2008-03
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Avoiding Irreducible CSC Conflicts by Internal Communication
Mark Schaefer, Walter Vogler, Dominic Wist and Ralf Wollowski
Technical Report, Institute of Computer Science, University of Augsburg, February 2008
2008-02
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2007
Combining Decomposition and Unfolding for STG Synthesis
Victor Khomenko, Mark Schaefer
ICATPN 2007, LNCS 4546, 223 - 243
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Output-Determinacy and Asynchronous Circuit Synthesis
Victor Khomenko, Mark Schaefer, Walter Vogler
Application of Concurrency to System Design ACSD 2007
IEEE 2007, 147-156
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Improved Decomposition of Signal Transition Graphs
Walter Vogler, Ben Kangsah
Fundamenta Informatica 78 (2007) 161 – 197
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Ready Simulation for Concurrency: It's Logical!
Gerald Lüttgen and Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2007
2007-04
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Performance of pipelined asynchronous systems
F. Corradini, Walter Vogler
J. Logic and Algebraic Programming 70 (2007) 201 – 221
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Output-Determinacy and Asynchronous Circuit Synthesis
Victor Khomenko, Mark Schaefer and Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, January 2007
2007-02
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Combining Decomposition and Unfolding for STG Synthesis
Victor Khomenko and Mark Schaefer
Technical Report, Institute of Computer Science, University of Augsburg, January 2007
2007-01
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2006
Bisimulation on speed: A unified approach
G. Lüttgen, Walter Vogler
Theor. Comp. Sci. 360 (2006) 209 – 227
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Checking a Mutex Algorithm in a Process Algebra with Fairness
F. Corradini, M. Di Berardini, Walter Vogler
CONCUR 2006, Bonn, August 2006
Eds.: C. Baier, H. Hermanns
Springer 2006, Lect. Notes Comput. Sci. 4137, 142 – 157
Copyright by Springer, Berlin, Heidelberg
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Fairness of Actions in System Computations
F. Corradini, M. R. Di Berardini, Walter Vogler
Acta Informatica 43 (2006) 73 – 130
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Fairness of Components in System Computations
F. Corradini, M. R. Di Berardini, Walter Vogler
Theor. Comp. Sci. 356 (2006) 291 – 324
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Strategies for Optimised STG Decomposition
Mark Schaefer, Walter Vogler, Ralf Wollowski, Victor Khomenko
Application of Concurrency to System Design ACSD 2006
IEEE 2006, 123 - 132
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2005
Fair Testing
A. Rensink, W. Vogler
Center for Telematics and Information Technology, Univ. of Twente,CTIT Technical Report 05-64
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Performance of Pipelined Asynchronous Systems
F. Corradini, W. Vogler
Formal Modeling and Analysis of Timed Systems
Eds.: P. Pettersson, Wang Yi
Springer 2005, Lect. Notes Comput. Sci. 3829, 242 – 257
Copyright by Springer, Berlin, Heidelberg
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Conjunction on Processes: Ready-Tree Semantics
G. Lüttgen, W. Vogler
Department of Computer Science, University of York, Report YCS 396, 2005
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Bisimulation on speed: lower time bounds
G. Lüttgen, Walter Vogler
RAIRO – Theoretical Informatics and Application 39 (2005) 587 – 618
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STG Decomposition: Optimised Backtracking and Component Reduction
Mark Schaefer
Technical Report, Institute of Computer Science, University of Augsburg, 2005
2005-13
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Determinate STG Decomposition of Marked Graphs
Mark Schaefer, Walter Vogler, Petr Jan?ar
Applications and Theory of Petri Nets 2005, Miami, Juni 2005
Eds.: G. Ciardo, P. Darondeau
Springer 2005, Lect. Notes Comput. Sci. 3536, 365 – 384
Copyright by Springer
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Improved Decomposition of STGs
Walter Vogler, Ben Kangsah
Application of Concurrency to System Design ACSD 2005, St. Malo, Juni 2005
Eds.: J. Desel, Y. Watanabe
IEEE 2005, 244 – 253
Copyright by IEEE
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Component Refinement and CSC Solving for STG Decomposition
Mark Schaefer, Walter Vogler
FOSSACS 2005, Edinburgh, April 2005
Ed.: V. Sassone
Springer 2005, Lect. Notes Comput. Sci. 3441, 348 – 363
Copyright by Springer
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Bisimulation on Speed: A Unified Approach
G. Lüttgen, W. Vogler
Foundations of Software Science and Computational Structures, FOSSACS 05
Eds.: V. Sassone
Springer 2005, Lect. Notes Comput. Sci. 3441, 79 – 94
Copyright by Springer, Berlin, Heidelberg
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Measuring the Performance of Asynchronous Systems with PAFAS
F. Corradini, Walter Vogler
Theor. Comp. Sci. 335 (2005) 187 – 213
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Fairness of Components in System Computations
F. Corradini, M.R. Di Berardini, W. Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2005
2005-03
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Fairness of Actions in System Computations
F. Corradini, M.R. Di Berardini, W. Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2005
2005-02
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2004
Timed Petri Nets: Efficiency of Asynchronous Systems
Elmar Bihler, Walter Vogler
Formal Methods for the Design of Real-Time Systems
Eds.:M. Bernardo, F. Corradini
Springer 2004, Lect. Notes Comput. Sci. 3185, 25 – 58
Copyright by Springer, Berlin, Heidelberg
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Fairness of Components in System Computations
F. Corradini, M. Di Berardini, Walter Vogler
Proceedings of the 11th International Workshop on Expressiveness in Concurrency (EXPRESS 2004)
Electronic Notes in Computer Science 128 (2005) 35-52
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Faster Asynchronous Systems
Walter Vogler
Inf. & Computation 184 (2003) 311 – 342
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Bisimulation on Speed: Worst-Case Efficiency
G. Lüttgen, Walter Vogler
Inf. & Computation 191 (2004) 105 – 144
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Bisimulation on Speed: Lower Time Bounds
G. Lüttgen, W. Vogler
Foundations of Software Science and Computational Structures, FOSSACS 04
Ed.: I. Walukiewicz
Springer 2004, Lect. Notes Comput. Sci. 2987, 333 – 347
Copyright by Springer, Berlin, Heidelberg
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Bisimulation on Speed: A Unified Approach
Gerald Lüttgen, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2004
2004-15
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Component Refinement and CSC Solving for STG Decomposition
Mark Schaefer, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2004
2004-13
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Determinate STG Decomposition of Marked Graphs
Mark Schaefer, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2004
2004-12
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Improved Decomposition of Signal Transition Graphs
Walter Vogler, Ben Kangsah
Technical Report, Institute of Computer Science, University of Augsburg, 2004
2004-08
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Bisimulation on Speed: Lower Time Bounds
Gerald Lüttgen, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2004
2004-01
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2003
Relating Fairness and Timing in Process Algebras
F. Corradini, M. Di Berardini, W. Vogler
CONCUR 2003 - Concurrency Theory
Eds.: R. Amadio, D. Lugiez
Springer 2003, Lect. Notes Comput. Sci. 2761, 446 – 460
Copyright by Springer, Berlin, Heidelberg
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2002
Decomposition in asynchronous circuit design
Walter Vogler, Ralf Wollowski
Concurrency and Hardware Design. Eds.: J. Cortadella et al.
Berlin, Heidelberg: Springer 2002, Lect. Notes Comput. Sci. 2549, 152 – 190
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Decomposition in asynchronous circuit design
Walter Vogler, Ralf Wollowski
FSTTCS 2002: Foundations of Software Technology and Theoretical Computer Science, Kanpur
Dezember 2002. Eds.: M. Agrawal, A. Seth.
Berlin, Heidelberg: Springer 2002, Lect. Notes Comput. Sci. 2556, 336–347
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Comparing the Worst-Case Efficiency of Asynchronous Systems with PAFAS
F. Corradini, W. Vogler, L. Jenner
Acta Informatica 38 (2002) 735 – 792
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Decomposition in Asynchronous Circuit Design
W. Vogler, R. Wollowski
Technical Report, Institute of Computer Science, University of Augsburg, 2002
2002-05
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Measuring the Performance of Asynchronous Systems with PAFAS
F. Corradini, W. Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2002
2002-04
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2001
Partial S-Invariants for the Verification of Infinite Systems Families
Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 2001
2001-04
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2000
Comparing the Worst-Case Efficiency of Asynchronous Systems with PAFAS
Flavio Corradini, Walter Vogler, Lars Jenner
Technical Report, Institute of Computer Science, University of Augsburg, 2000
2000-06
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Axiomatizing a Fragment of PAFAS
Walter Vogler, Lars Jenner
Technical Report, Institute of Computer Science, University of Augsburg, 2000
2000-01
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1999
Efficiency of Asynchronous Systems That Communicate Asynchronously
Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 1999
1999-06
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1998
Concurrent Implementation of Asynchronous Transition Systems
Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 1998
1998-05
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Further Studies on Timed Testing of Concurrent Systems
Lars Jenner
Technical Report, Institute of Computer Science, University of Augsburg, 1998
1998-04
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Comparing the Efficiency of Asynchronous Systems
Lars Jenner, Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 1998
1998-03
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1997
Partial Order Semantics and Read Arcs
Walter Vogler
Technical Report, Institute of Computer Science, University of Augsburg, 1997
1997-01
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1996
Modular Construction of Fast Asynchronous Systems
Lars Jenner
Technical Report, Institute of Computer Science, University of Augsburg, 1996
1996-02